DESCRIPTION
The EPC9002 development board is a 100 V maximum device volt-
age, 10 A maximum output current, half bridge with onboard gate
drives, featuring the EPC2001 enhancement mode ( eGaN ?) field
effect transistor (FET). The purpose of this development board is
to simplify the evaluation process of the EPC2001 eGaN FET by in-
cluding all the critical components on a single board that can be
easily connected into any existing converter.
The EPC9002 development board is 2” x 1.5” and contains two
EPC2001 eGaN FET in a half bridge configuration using Texas
Table 1: Performance Summary (TA = 25°C)
www.epc-co.com
Instruments LM5113 gate driver, supply and bypass capacitors.
The board contains all critical components and layout for optimal
switching performance. There are also various probe points to fa-
cilitate simple waveform measurement and efficiency calculation.
A complete block diagram of the circuit is given in Figure 1.
For more information on the EPC2001s eGaN FET please refer to
the datasheet available from EPC at www.epc-co.com. The data-
sheet should be read in conjunction with this quick start guide
SYMBOL PARAMETER
CONDITIONS
MIN
MAX
UNITS
V DD
V IN
V OUT
I OUT
Gate Drive Input Supply Range
Bus Input Voltage Range
Switch Node Output Voltage
Switch Node Output Current
7
12
70*
100
10*
V
V
V
A
V PWM
PWM Logic Input Voltage Threshold
Minimum ‘High’ State Input Pulse Width
Minimum ‘Low’ State Input Pulse Width
Input ‘High’
Input ‘Low’
VPWM rise and fall time < 10ns
VPWM rise and fall time < 10ns
3.5
0
60
200 #
6
1.5
V
V
ns
ns
* Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
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